A highly reliable low temperature Al-Cu line/via metallization for sub-half micrometer CMOS

Abstract
In this paper we present significant advances over the current art in terms of enhanced electromigration lifetime, low temperature deposition, and improved damascene capability of Al-Cu via/line structure. The electromigration data shows that Al-Cu via/interconnect structure deposited by a new low pressure sputtering process (LPS) results in at least "9/spl times/" better electromigration lifetime (t/sub 50/) to that of conventionally used CVD W stud/Al-Cu interconnect structure. This significant improvement in the reliability may be attributed to the "breakthrough" in void-free filling of high aspect ratio (3 to 4) sub-half micrometer vias with low resistivity metal such as Al-Cu at as low temperature as room temperature. The LPS process eliminates the need of a collimator normally used to fill or coat the vias and improves throughput by a factor of 5/spl times/ at least compared to collimation. The extendibility of this technique beyond 0.25 /spl mu/m contact geometries is demonstrated. The integration of the LPS process, Al-Cu via/interconnects using damascene process demonstrates a working 512 K SRAM chip with 0.5 /spl mu/m minimum groundrules.

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