Electrical parameters, static and dynamic response of I/sup 2/L
- 1 October 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 12 (5) , 440-449
- https://doi.org/10.1109/JSSC.1977.1050936
Abstract
Definitions of easily measurable electrical parameters of I/SUP 2/L cells are given. These parameters are used in analysis of static and dynamic behavior of cascaded inverters. Simple expressions are derived for voltage-current-power- and energy-noise margins, recovery time, fall time, and stage delay at high injector current. The analysis is one dimensional. A saturation control circuit for improving intrinsic delay for Schottky I/SUP 2/L is discussed.Keywords
This publication has 9 references indexed in Scilit:
- A new high speed I/sup 2/L structureIEEE Journal of Solid-State Circuits, 1977
- Folded-collector integrated injection logicIEEE Journal of Solid-State Circuits, 1976
- The effect of base contact position on the relative propagation delays of the multiple outputs of an I/sup 2/L gateIEEE Journal of Solid-State Circuits, 1976
- A polysilicon source and drain MOS transistor (PSD MOST)IEEE Transactions on Electron Devices, 1976
- Device physics of integrated injection logicIEEE Transactions on Electron Devices, 1975
- The injection model-a structure-oriented model for merged transistor logic (MTL)IEEE Journal of Solid-State Circuits, 1974
- Terminal-oriented model for merged transistor logic (MTL)IEEE Journal of Solid-State Circuits, 1974
- Statistical Circuit Design: Characterization and Modeling for Statistical DesignBell System Technical Journal, 1971
- Charge analysis of transistor operation including delay effectsIRE Transactions on Electron Devices, 1961