A low-temperature NMOS technology with Cesium-implanted load devices
- 1 January 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 34 (1) , 28-38
- https://doi.org/10.1109/t-ed.1987.22882
Abstract
A 2-µm enhancement/depletion-type NMOS technology designed for operation at liquid-nitrogen temperature is described. A cesium oxide implant has been used to realize load devices that are not degraded by the freeze out of mobile carriers that occurs in the bulk of conventional depletion-mode transistors at low temperature, Unloaded ring oscillators, fabricated using this technology, have an average propagation delay of 360 ps/stage and a power dissipation of 190 µW/stage with a 2.5-V power supply at 77 K; this represents an improvement in speed of a factor of 2.5 over a conventional NMOS technology operating at room temperature. Simulations predict a further decrease in delay to 200 ps/stage for a 2-/µm process may be achieved through optimization of the Cs-implanted load device without compromising noise margins.Keywords
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