A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop
- 1 March 2001
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 36 (3) , 424-431
- https://doi.org/10.1109/4.910481
Abstract
A 900-MHz phase-locked loop frequency synthesizer implemented in a 0.6-/spl mu/m CMOS technology is developed for the wireless integrated network sensors applications. It incorporates an automatic switched-capacitor (SC) discrete-tuning loop to extend the overall frequency tuning range to 20%, while the VCO gain (K/sub VCO/) resulting from the CMOS varactor continuous-tuning is kept low at only 20 MHz/V in order to improve the reference spurs and noise performance. This frequency synthesizer achieves a phase noise of -102 dBc/Hz at 100 kHz offset frequency and reference spurs below -55 dBc. The synthesizer, including an on-chip VCO, dissipates only 2.5 mA from a 3-V supply.Keywords
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