Characterization and analysis of a new gate leakage mechanism at high drain bias in InAlAs/InGaAs heterostructure field-effect transistors
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
InAlAs/InGaAs Heterostructure Field-Effect Transistors (HFET) exhibit excellent DC- and RF- performance and are well suited for low power applications in the millimeter-wavelength range. Using sophisticated crystal growth modes and device fabrication techniques, the capability of high power applications was also demonstrated. But with increasing drain-source voltages V ds >3 V it new parasitic phenomenon can be detected additive to the well-known gate leakage mechanism. An exponentially growing gate current bump, strongly dependent on the HFET design, appears at positive gate-source voltages V gs Author(s) Auer, U. Dept. of Solid-State Electron., Gerhard-Mercator-Univ. Duisburg, Germany Reuter, R. ; Ellrodt, P. ; Prost, W. ; Tegude, F.J.Keywords
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