Detecting I/O and Internal Feedback Bridging Faults
- 1 June 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-34 (6) , 553-557
- https://doi.org/10.1109/TC.1985.5009408
Abstract
The testing of bridging faults (short circuits) has become increasingly important with the increasing density in VLSI (very large scale integration) chips. Yet very little work has been done in this area. In this correspondence, based on a two-state sequential machine model, we present the conditions for a circuit with feedback bridgings to oscillate and to exhibit stable sequential behavior. It is shown that only two test patterns are sufficient to detect feedback bridging faults between input and output lines of a general combinational network. We derive a simple equation to generate test patterns for detecting feedback bridging faults among internal lines of a general combinational network.Keywords
This publication has 8 references indexed in Scilit:
- A Practical Approach to Fault Simulation and Test Generation for Bridging FaultsIEEE Transactions on Computers, 1985
- A Comparison of Short Transverse Tension Test MethodsPublished by ASTM International ,1983
- Detection and Location of Input and Feedback Bridging Faults Among Input and Output LinesIEEE Transactions on Computers, 1980
- Undetectability of Bridging Faults and Validity of Stuck-At Fault Test SetsIEEE Transactions on Computers, 1980
- Optimal Detection of Bridge Faults and Stuck-At Faults in Two-Level LogicIEEE Transactions on Computers, 1978
- Diagnosis of Short-Circuit Faults in Combinational CircuitsIEEE Transactions on Computers, 1974
- Bridging and Stuck-At FaultsIEEE Transactions on Computers, 1974
- Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional LogicIEEE Transactions on Computers, 1973