A latch phenomenon in buried N-body SOI NMOSFET's
- 1 July 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 12 (7) , 372-374
- https://doi.org/10.1109/55.103611
Abstract
The authors show that a snapback effect resulting in a latching can exist in a buried N-body NMOS device on silicon-on-insulator (SOI). Using numerical simulations, it is demonstrated that when V/sub GS/ is less than the flat-band voltage and after triggering, this kind of device behaves as a floating-base n-p-n bipolar transistor, the base hole density of which is controlled by an inversion layer instead of the usual base doping. The latch phenomenon results from the combination of this parasitic quasi-bipolar device, a back surface NMOS transistor, and impact ionization current.Keywords
This publication has 6 references indexed in Scilit:
- SIMOX and VLSI high speed and rad hard applications: discussion of floating body effects and circuits optimizationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- An approach to analytical modeling of snapback in SOI devicesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Analysis and control of BJT latch in fully depleted floating-body submicron SOI MOSFETsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Silicon-on-insulator by oxygen implantation: An advanced technologyMicroelectronic Engineering, 1988
- Single-transistor latch in SOI MOSFETsIEEE Electron Device Letters, 1988
- A simple method to characterize substrate current in MOSFET'sIEEE Electron Device Letters, 1984