A 16-ns 1-Mb CMOS EPROM

This publication has 4 references indexed in Scilit:

• A 23-ns 256 K EPROM with double-layer metal and address transition detection
  IEEE Journal of Solid-State Circuits, 1989
• A 68ns 4Mbit CMOS EPROM with high noise immunity design
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1989
• A low power 46 ns 256 kbit CMOS static RAM with dynamic double word line
  IEEE Journal of Solid-State Circuits, 1984
• A programmable 256K CMOS EPROM with on-chip test circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1984