Performance and reliability aspects of FOND: a new deep submicron CMOS device concept
- 1 January 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 43 (9) , 1407-1415
- https://doi.org/10.1109/16.535326
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
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- Gate-capacitance characteristics of deep-submicron LATID (large-angle-tilt implanted drain) MOSFETsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A hybrid device simulator that combines Monte Carlo and drift-diffusion analysisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994
- Deep-submicrometer large-angle-tilt implanted drain (LATID) technologyIEEE Transactions on Electron Devices, 1992
- Impact of the gate-drain overlapped device (GOLD) for deep submicrometer VLSIIEEE Transactions on Electron Devices, 1988