Study Of The ESD Behavior Of Different Clamp Configurations In A 0.35/spl mu/m Cmos Technology

This publication has 4 references indexed in Scilit:

• Risetime effects of HBM and square pulses on the failure thresholds of GGNMOS-transistors
  Microelectronics Reliability, 1996
• State-of-the-art issues for technology and circuit design of ESD protection in CMOS ICs
  Semiconductor Science and Technology, 1996
• Building-in ESD/EOS reliability for sub-halfmicron CMOS processes
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1995
• NMOS protection circuitry
  IEEE Transactions on Electron Devices, 1985