A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver
Top Cited Papers
- 1 May 2000
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 35 (5) , 780-787
- https://doi.org/10.1109/4.841507
Abstract
A fully integrated 5-GHz phase-locked loop (PLL) based frequency synthesizer is designed in a 0.24 /spl mu/m CMOS technology. The power consumption of the synthesizer is significantly reduced by using a tracking injection-locked frequency divider (ILFD) as the first frequency divider in the PLL feedback loop. On-chip spiral inductors with patterned ground shields are also optimized to reduce the VCO and ILFD power consumption and to maximize the locking range of the ILFD. The synthesizer consumes 25 mW of power of which only 3.8 mW is consumed by the VCO and the ILFD combined. The PLL has a bandwidth of 280 kHz and a phase noise of -101 dBc/Hz at 1 MHz offset frequency. The spurious sidebands at the center of adjacent channels are less than -54 dBc.Keywords
This publication has 15 references indexed in Scilit:
- Design of high-Q varactors for low-power wireless applications using a standard CMOS processPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Optimization of inductor circuits via geometric programmingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A physical model for planar spiral inductors on siliconPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Analysis and optimization of accumulation-mode varactor for RF ICsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A single-chip CMOS transceiver for DCS-1800 wireless communicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Superharmonic injection-locked frequency dividersIEEE Journal of Solid-State Circuits, 1999
- A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filtersIEEE Journal of Solid-State Circuits, 1998
- Low-power dividerless frequency synthesis using aperture phase detectionIEEE Journal of Solid-State Circuits, 1998
- A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulationIEEE Journal of Solid-State Circuits, 1997
- On-chip Spiral Inductors With Patterned Ground Shields For Si-based RF IC'sPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1997