Behavior of inversion layers in 3C silicon carbide

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Abstract
A study on the field‐induced surface‐charge region in 3C silicon carbide (SiC) using 1 MHz capacitance‐voltage (C‐V) measurements at room temperature is here reported. A double column mercury probe was used on oxidized SiC substrates to form metal‐oxide‐semiconductor (MOS) structures. These structures were characterized in terms of the substrate doping profile, effective fixed oxide charge, and interface trap density. A distinctive feature of the MOS C‐V curves from accumulation to inversion is that after going into deep depletion the capacitance rises to its equilibrium inversion level during the voltage sweep. Capacitance transient measurements indicate that the minority‐carrier generation occurs at the SiO2/SiC interface.