Recursive layout generation

This publication has 11 references indexed in Scilit:

• WireLisp: combining graphics and procedures in a circuit specification language
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Parameterized schematics (VLSI)
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Bisim: a simulator for custom ECL circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• PatchWork: layout from schematic annotations
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Boolean matching for full-custom ECL gates
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A 300-MHz 115-W 32-b bipolar ECL microprocessor
  IEEE Journal of Solid-State Circuits, 1993
• GORDIAN: VLSI placement by quadratic programming and slicing optimization
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
• Timing Analysis and Performance Improvement of MOS VLSI Designs
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• The Magic VLSI Layout System
  IEEE Design & Test of Computers, 1985
• Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1984