Carrier transport in polycrystalline silicon films deposited by a layer-by-layer technique

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Abstract
The transport processes in phosphorus-doped polycrystalline silicon thin films are examined by standard six-electrode Hall effect and conductivity measurements over a wide temperature range, 100–400 K. These films were deposited by a novel layer-by-layer technique at very low substrate temperatures (300–360 °C) using fluorinated precursors, SiFmHn (m+n≤3). The analysis indicated that the grain boundaries are the major barriers to carrier transport. The grain boundary carrier transport is controlled by thermionic emission at high temperatures, whereas at low temperatures, it is dominated by a tunneling process through the barriers. The electrical properties of these films were found to vary as a function of the film thickness. It appears that the grain boundary defects are passivated to a large degree by this novel deposition technique and that the grain boundary barriers are consequently smaller than those in films prepared by other growth schemes.