Design considerations for a radiation hardened nonvolatile memory
Open Access
- 1 December 1993
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 40 (6) , 1610-1618
- https://doi.org/10.1109/23.273499
Abstract
Sub-optimal design practices can reduce the radiation hardness of a circuit even though it is fabricated in a radiation hardened process. This is especially true for a nonvolatile memory, as compared to a standard digital circuit, where high voltages and unusual bias conditions are required. This paper will discuss the design techniques used in the development of a 64K EEPROM (Electrically Erasable Programmable Read Only Memory) to maximize radiation hardness. The circuit radiation test results will be reviewed in order to provide validation of the techniques.This publication has 14 references indexed in Scilit:
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