Decoupled sectored caches
- 1 January 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 46 (2) , 210-215
- https://doi.org/10.1109/12.565601
Abstract
Maintaining a low tag array size is a major issue in many cache designs. In the decoupled sectored cache, we present in this paper, the monolithic association between a cache block and a tag location is broken; the address tag location associated with a cache line location is dynamically chosen at fetch time among several possible locations.The hit ratio for a decoupled sectored cache is very close to the hit ratio for a nonsectored cache. Then a decoupled sectored cache will allow the same level of performance as a nonsectored cache, but at a significantly lower hardware cost.Keywords
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