Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation

This publication has 13 references indexed in Scilit:

• Reducing state loss for effective trace sampling of superscalar processors
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Parsim: a parallel trace-driven simulation facility for fast and accurate performance analysis studies
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Basic block distribution analysis to find periodic behavior and simulation points in applications
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Minimal subset evaluation: rapid warm-up for simulated hardware state
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Automatically characterizing large scale program behavior
  Published by Association for Computing Machinery (ACM) ,2002
• An analytical model of the working-set sizes in decision-support systems
  Published by Association for Computing Machinery (ACM) ,2000
• Branch prediction, instruction-window size, and cache size: performance trade-offs and simulation techniques
  IEEE Transactions on Computers, 1999
• An inter-reference gap model for temporal locality in program behavior
  Published by Association for Computing Machinery (ACM) ,1995
• On the fractal dimension of computer programs and its application to the prediction of the cache miss ratio
  IEEE Transactions on Computers, 1989
• Accurate low-cost methods for performance evaluation of cache memory systems
  IEEE Transactions on Computers, 1988