Intrachip global interconnects and the saturation of moore's law
- 8 November 2004
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- The future of wiresProceedings of the IEEE, 2001
- Prediction of net-length distribution for global interconnects in a heterogeneous system-on-a-chipIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000
- The interpretation and application of Rent's ruleIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2000
- A global wiring paradigm for deep submicron designIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000
- Wire Length Distribution for Placements of Computer LogicIBM Journal of Research and Development, 1981