A new mapping technique for automated design of highly efficient multiplexed FIR digital filters
- 22 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 4, 2252-2255
- https://doi.org/10.1109/iscas.1997.612770
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- Pipeline interleaving design for FIR, IIR, and FFT array processorsJournal of Signal Processing Systems, 1995
- A single-chip 12.7 Mchips/s digital IF BPSK direct sequence spread-spectrum transceiver in 1.2 μm CMOSIEEE Journal of Solid-State Circuits, 1994
- Synthesis of control circuits in folded pipelined DSP architecturesIEEE Journal of Solid-State Circuits, 1992
- Carry-save architectures for high-speed digital signal processingJournal of Signal Processing Systems, 1991
- Short-length FIR filters and their use in fast nonrecursive filteringIEEE Transactions on Signal Processing, 1991
- Direct-sequence spread-spectrum parallel acquisition in a fading mobile channelIEEE Transactions on Communications, 1990