Performance enhancements in BOLD using 'implications'

This publication has 6 references indexed in Scilit:

• Don't cares and global flow analysis of Boolean networks
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Multi-level logic minimization using implicit don't cares
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
• Verification Algorithms for VLSI Synthesis
  Published by Springer Nature ,1987
• Global Flow Analysis in Automatic Logic Design
  IEEE Transactions on Computers, 1986
• Logic Minimization Algorithms for VLSI Synthesis
  Published by Springer Nature ,1984
• PODEM-X: An Automatic Test Generation System for VLSI Logic Structures
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1981