Relaxed look-ahead pipelined LMS adaptive filters and their application to ADPCM coder

This publication has 36 references indexed in Scilit:

• Roundoff error analysis of the pipelined ADPCM coder
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005
• VLSI implementation of a 100 MHz pipelined ADPCM codec chip
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Design of pipelined lattice IIR digital filters
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Pipelined adaptive DFE architectures
  Published by SPIE-Intl Soc Optical Eng ,1993
• Pipelining in dynamic programming architectures
  IEEE Transactions on Signal Processing, 1991
• A systematic approach for design of digit-serial signal processing architectures
  IEEE Transactions on Circuits and Systems, 1991
• Static rate-optimal scheduling of iterative data-flow programs via optimum unfolding
  IEEE Transactions on Computers, 1991
• Design of a DPCM codec for VLSI realization in CMOS technology
  Proceedings of the IEEE, 1985
• On supercomputing with systolic/wavefront array processors
  Proceedings of the IEEE, 1984
• Optimizing synchronous systems
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1981