Limitations on the performance of field-effect devices for logic applications
- 1 January 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Proceedings of the IEEE
- Vol. 69 (2) , 226-231
- https://doi.org/10.1109/proc.1981.11954
Abstract
The switching time and power dissipation of field-effect devices in integrated logic circuits are obtained using a simple equivalent circuit. It is seen that performance is determined by four basic parameters: channel length, operating voltage, parasitic capacitance, and saturation drift velocity. The effects limiting the optimization of these parameters are examined. It is found that channel length cannot be reduced below about 0.2 µm in the metal-oxide-semiconductor field-effect transistor (MOSFET) or below about 500 Å in the metal-semiconductor field-effect transistor (MESFET). Operating voltages cannot be reduced below about 750 mV due to subthreshold leakage. In the limit of extremely small sizes, the most promising high-speed devices appear to be MESFET structures in GaAs or InP.Keywords
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