A reevaluation of the meaning of capacitance plots for Schottky-barrier-type diodes

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Abstract
Capacitance–voltage (C‐V) data, in the form of 1/C 2 versus voltage plots, have long been used to extract information on the space charge region doping and barrier height in Schottky‐barrier‐type diodes. The meaning of the slope and voltage intercept of these 1/C 2 versus voltage plots for reverse‐biased diodes is reexamined in this analysis for the case when there is an inadvertent or purposeful interface layer present. The possibility of having interface states, one type of which communicates with the metal and another type of which communicates with the semiconductor, is considered, as is the fact that these two classes of states may, or may not, be able to follow an ac signal. The analysis first assumes that the densities of these states do not vary across the gap; this restriction is later relaxed and the possibility of variable densities of interface states is considered. The results of the analysis differ from those of previous studies. In general, it is found that most sets of interface state characteristics lead to nonlinear 1/C 2 plots when an interfacial layer is present. Constant 1/C 2 slopes (true straight line plots for all values of reverse bias) are found only if there are no interface states present or only if the states present have a constant density across the gap and follow the metal for all frequencies.