Deep submicron microprocessor design issues
- 1 January 1999
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro
- Vol. 19 (4) , 11-22
- https://doi.org/10.1109/40.782563
Abstract
No abstract availableThis publication has 8 references indexed in Scilit:
- Predicting CMOS speed with gate oxide and voltage scaling and interconnect loading effectsIEEE Transactions on Electron Devices, 1997
- Hardware/Software Co-DesignPublished by Springer Nature ,1996
- Hitting the memory wallACM SIGARCH Computer Architecture News, 1995
- Fast multiplication in VLSI using wave pipelining techniquesJournal of Signal Processing Systems, 1994
- Low-power CMOS digital designIEEE Journal of Solid-State Circuits, 1992
- CMOS device modeling for subthreshold circuitsIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1992
- Optimal pipeliningJournal of Parallel and Distributed Computing, 1990
- Maximum-rate pipeline systemsPublished by Association for Computing Machinery (ACM) ,1969