Design considerations of SOI digital CMOS VLSI
- 27 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper reviews the recent advances of SOI for CMOS VLSI memory and logic applications with particular emphasis on the design issues and advantages resulting from the unique SOI device structure. Static random access memories (SRAMs), dynamic random access memories (DRAMs), and digital CMOS logic circuits are considered. The impact of floating body effects in partially-depleted devices on circuit operation, stability, and functionality are addressed. The use of smart body contacts to improve the power and delay performance are discussed. Global design issues for high-performance microprocessor applications are addressed.Keywords
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