Programs for Verifying Circuit Connectivity of MOS/LSI Mask Artwork
- 1 January 1982
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- A layout checking system for large scale integrated circuitsPublished by Association for Computing Machinery (ACM) ,1988
- Fast algorithm for LSI artwork analysisPublished by Association for Computing Machinery (ACM) ,1988
- MOSSIM: A Switch-Level Simulator for MOS LSIPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Automatic VLSI Layout VerificationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Circuit Recognition and Verification Based on Layout InformationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- MACLOS-mask checking logic simulator [for MOS LSI]IEEE Journal of Solid-State Circuits, 1980
- Topological Analysis for VLSI CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1979