Electrical and material quality of Si/sub 1-x/Ge/sub x//Si p-N heterojunctions produced by limited reaction processing
- 1 April 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 10 (4) , 159-161
- https://doi.org/10.1109/55.31703
Abstract
Si/sub 1-x/Ge/sub x//Si p-N heterojunctions prepared by a chemical vapor deposition technique, limited reaction processing (LRP) were characterized using DC electrical measurements, transmission electron microscopy (TEM), and X-ray topography. Heterojunctions with Si/sub 1-x/Ge/sub x/ layer thickness ranging from 52 to 295 nm and a constant Ge fraction of 23% were fabricated to study the effect of increasing the number of misfit dislocations on the device characteristics. Devices with the thinnest layers (<or=120 nm) display forward characteristics with ideality factors of 1.01 and reverse leakage current densities of less than 4 nA/cm for a 5-V reverse bias. These thin-layer devices have dislocation spacings greater than 10 mu m. Devices utilizing Si/sub 1-x/Ge/sub x/ layers thicker than 200 nm have forward characteristics which clearly display the presence of recombination currents, and reverse leakage current densities greater than 290 nA/cm/sup 2/ at -5 V. The dislocation spacing in these devices is less than 1 mu m. Ideal characteristics were found at room temperature in devices known to contain dislocations.Keywords
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