Clocking design and analysis for a 600-MHz Alpha microprocessor

Abstract
Design, analysis, and verification of the clock hierarchyon a 600-MHz Alpha microprocessor is presented. Theclock hierarchy includes a gridded global clock, gridded majorclocks, and many local clocks and local conditional clocks, whichtogether improve performance and power at the cost of verificationcomplexity. Performance is increased with a windowpanearrangement of global clock drivers for lowering skew andemploying local clocks for time borrowing. Power is reduced byusing major...

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