Clocking design and analysis for a 600-MHz Alpha microprocessor
- 1 January 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 33 (11) , 1627-1633
- https://doi.org/10.1109/4.726547
Abstract
Design, analysis, and verification of the clock hierarchyon a 600-MHz Alpha microprocessor is presented. Theclock hierarchy includes a gridded global clock, gridded majorclocks, and many local clocks and local conditional clocks, whichtogether improve performance and power at the cost of verificationcomplexity. Performance is increased with a windowpanearrangement of global clock drivers for lowering skew andemploying local clocks for time borrowing. Power is reduced byusing major...Keywords
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