Bipolar transistor modeling of avalanche generation for computer circuit simulation

1 June 1975

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 22 (6) , 334-338
https://doi.org/10.1109/t-ed.1975.18132

Abstract

An avalanche generation model is developed and incorporated into computer circuit analysis programs SLIC and NICAP. A modified form of Miller's empirical expression for generation is found to agree well with measured data for Western Electric and commercial n-p-n transistors. Measurement techniques and parameter determination for the three model coefficients are discussed. Equation constraints appropriate for computer implementation are presented.

Keywords

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