A 4-bit×4-bit multiplier and 3-bit counter in Josephson threshold logic
- 1 August 1987
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 22 (4) , 606-612
- https://doi.org/10.1109/jssc.1987.1052778
Abstract
No abstract availableKeywords
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