Current-mode CMOS multiple-valued logic circuits

This publication has 23 references indexed in Scilit:

• A bi-directional current-mode CMOS multiple valued logic memory circuit
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A CMOS quaternary threshold logic full adder circuit with transparent latch
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• HAMLET-an expression compiler/optimizer for the implementation of heuristics to minimize multiple-valued programmable logic arrays
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• CMOS current-mode multivalued PLAs
  IEEE Transactions on Circuits and Systems, 1991
• Current-mode algorithmic analog-to-digital converters
  IEEE Journal of Solid-State Circuits, 1990
• Multiple-valued radix-2 signed-digit arithmetic circuits for high-performance VLSI systems
  IEEE Journal of Solid-State Circuits, 1990
• CMOS quaternary latch
  Electronics Letters, 1989
• A 32*32-bit multiplier using multiple-valued MOS current-mode circuits
  IEEE Journal of Solid-State Circuits, 1988
• Reference refreshing cyclic analog-to-digital and digital-to-analog converters
  IEEE Journal of Solid-State Circuits, 1986
• A ratio-independent algorithmic analog-to-digital conversion technique
  IEEE Journal of Solid-State Circuits, 1984