Short-circuit power dissipation formulae for CMOS gates
- 24 August 2005
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1333-1336
- https://doi.org/10.1109/iscas.1993.692900
Abstract
First Page of the Article Author(s) Vemuru, S. City College of New York Scheinberg, N. ; Smith, E.Keywords
This publication has 7 references indexed in Scilit:
- Trading speed for low power by choice of supply and threshold voltagesIEEE Journal of Solid-State Circuits, 1993
- Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulasIEEE Journal of Solid-State Circuits, 1990
- A module generator for optimized CMOS buffersIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- CMOS Circuit Speed and Buffer OptimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Accurate simulation of power dissipation in VLSI circuitsIEEE Journal of Solid-State Circuits, 1986
- Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuitsIEEE Journal of Solid-State Circuits, 1984
- Modeling and simulation of insulated-gate field-effect transistor switching circuitsIEEE Journal of Solid-State Circuits, 1968