SiGe BiCMOS Technology with 3.0 ps Gate Delay
- 1 December 2007
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This work reports on a 130 nm BiCMOS technology with high-speed SiGe:C HBTs featuring a transit frequency of 255 GHz and a maximum oscillation frequency of 315 GHz at an emitter area of 0.17 x 0.53 mum2. A minimum gate delay of 3.0 ps was achieved for CML ring oscillators. Breakdown voltages of the HBTs are measured to be BVCEO=1.8 V, BVCBO=5.6 V, andBVEBO=1.9 V.Keywords
This publication has 4 references indexed in Scilit:
- 3.3 ps SiGe bipolar technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A low-parasitic collector construction for high-speed SiGe:C HBTsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- SiGe:C BiCMOS technology with 3.6 ps gate delayPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- 3.21 ps ECL gate using InP/InGaAs DHBT technologyElectronics Letters, 2003