Hardware Description Levels and Test for Complex Circuits
- 1 January 1981
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A complex circuit can be described at the structural level (gate or register transfer description), at the functional level (state based description) or at a higher level (algorithmic or behavioral level). Test methods have been studied at each level but present severe constraints : complexity problems for the structural level, and error hypotheses for the other levels. After a presentation of the state of the art, we show that the practical solution is a multilevel approach using the techniques of each type of these methods.Keywords
This publication has 9 references indexed in Scilit:
- A METHODOLOGY FOR FUNCTIONAL LEVEL TESTING OF MICROPROCESSORSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- LOGEACM SIGDA Newsletter, 1979
- Symmetry, Automorphism, and TestIEEE Transactions on Computers, 1979
- Microprocessor systems testing — a review and future prospectsEuromicro Newsletter, 1979
- Dynamic Testing of Control UnitsIEEE Transactions on Computers, 1978
- Processor Testability and Design ConsequencesIEEE Transactions on Computers, 1976
- Cause-Effect Analysis for Multiple Fault Detection in Combinational NetworksIEEE Transactions on Computers, 1971
- An axiomatic basis for computer programmingCommunications of the ACM, 1969
- Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic CircuitsIEEE Transactions on Electronic Computers, 1967