A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's
- 1 May 1998
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 33 (5) , 793-799
- https://doi.org/10.1109/4.668995
Abstract
No abstract availableKeywords
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