Wafer fusion bonding and its application to silicon-on-insulator fabrication
- 1 September 1991
- journal article
- Published by IOP Publishing in Journal of Micromechanics and Microengineering
- Vol. 1 (3) , 145-151
- https://doi.org/10.1088/0960-1317/1/3/003
Abstract
The principles of the wafer fusion bonding technique at room temperature and with thermal treatment are described. Experiments using plain and patterned silicon wafers coated with different surface materials are presented. Results obtained for different thermal annealing conditions are discussed in terms of homogeneity and strength of the bond. Thinning of the bonded wafers is performed by grinding and polishing or with preferential etch techniques using p+ etchstops. Uniform silicon-on-insulator (SOI) films with thicknesses 1 mu m-30 mu m have been obtained.Keywords
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