Abstract
ESD testing results of aluminum and copper interconnect wires and vias for advanced semiconductor technologies demonstrate that interconnects will be a limiting failure mechanism in the future for ESD robustness of semiconductor chips. Comparison of copper and aluminum interconnect and via ESD robustness and failure mechanisms will be shown. Results demonstrate an improvement in the ESD robustness of a Cu-based interconnect system, compared to AI-based interconnects, with an improvement in the critical current, in the human body and machine model time regimes.

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