FREEZE: a new approach for testing sequential circuits
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors present a new approach for testing sequential circuits which extends the classical concept of a test sequence. The classical approach applies only one vector in every state. In contrast, the new approach temporarily disables the sequential behavior of the circuit by holding the clock inactive and applies a group of vectors in every state. In this way many faults can be combinationally detected. A test generation algorithm called FIRST (fault-independent rapid sequential test generator) was developed based on the new approach. FIRST detected a large percentage of the faults that were detected by a conventional fault-oriented sequential test generator in less CPU time and with shorter sequences.Keywords
This publication has 12 references indexed in Scilit:
- A TEST GENERATION METHOD FOR SEQUENTIAL CIRCUITS BASED ON MAXIMUM UTILIZATION OF INTERNAL STATESPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- The Best Flip-Flops to ScanPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Combinational profiles of sequential benchmark circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- An economical scan design for sequential logic test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- IC qualityd and test transparencyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Pascant: a partial scan and test generation systemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- HITEC: a test generation package for sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Gentest: an automatic test-generation system for sequential circuitsComputer, 1989
- BALLAST: a methodology for partial scan designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- Defect Level as a Function of Fault CoverageIEEE Transactions on Computers, 1981