A recessed-gate InAlAs/n/sup +/-InP HFET with an InP etch-stop layer

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Abstract
The authors have exploited both the attractive transport properties and the etch selectivity of InP in a novel InAlAs/n/sup +/-InP metal-insulator-doped-channel heterostructure FET (MIDFET). In several other material systems, the MIDFET has been shown to be well-suited to high-power telecommunications applications. The device employs InP both as the channel layer and as an etch-stop layer in a selective-etch recessed-gate process. L/sub g/=1.8- mu m devices achieve g/sub m/ and I/sub D,max/ values of 224 mS/mm and 408 mA/mm, respectively, the highest recorded values for an InP channel HFET with L/sub g/>or=0.8- mu m, including MODFETs. These figures combine with a breakdown voltage of 10 V and peak values of f/sub T/ and f/sub max/ of 10.5 and 28 GHz, respectively. The selective-etch recessed-gate process contributes to excellent device performance while maintaining a tight 60-mV threshold voltage distribution (13 mV between adjacent devices).