Progress in speed power performance of bipolar technology by sub-10 keV B implantation into amorphized Si

This publication has 14 references indexed in Scilit:

• Vertical scaling of the polysilicon emitter/implanted base structure
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• A sub-30 psec Si bipolar LSI technology
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• 75-GHz f/sub T/ SiGe-base heterojunction bipolar transistors
  IEEE Electron Device Letters, 1990
• Defect formation in silicon at a mask edge during crystallization of an amorphous implantation layer
  Journal of Applied Physics, 1989
• A 1- mu m polysilicon self-aligning bipolar process for low-power high-speed integrated circuits
  IEEE Electron Device Letters, 1989
• Shallow junction formation by boron implantation with energies between 2 and 5 keV and rapid thermal annealing
  Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, 1989
• SHALLOW DOPING PROFILES FOR HIGH-SPEED BIPOLAR TRANSISTORS
  Le Journal de Physique Colloques, 1988
• Optimization of the germanium preamorphization conditions for shallow-junction formation
  IEEE Transactions on Electron Devices, 1988
• A systematic analysis of defects in ion-implanted silicon
  Applied Physics A, 1988
• Substrate-orientation dependence of the epitaxial regrowth rate from Si-implanted amorphous Si
  Journal of Applied Physics, 1978