Vertical bipolar transistors fabricated in local silicon on insulator films prepared using confined lateral selective epitaxial growth (CLSEG)
- 1 January 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 37 (11) , 2336-2342
- https://doi.org/10.1109/16.62284
Abstract
No abstract availableKeywords
This publication has 19 references indexed in Scilit:
- A new epitaxy technique for device isolation and advanced device structuresPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- SOI structures by selective epitaxial lateral overgrowthPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Confined lateral selective epitaxial growth of silicon for device fabricationIEEE Electron Device Letters, 1990
- Issues and Problems Involved in Selective Epitaxial Growth of Silicon for SOI FabricationJournal of the Electrochemical Society, 1989
- Two-dimensional simulation and measurement of high-performance MOSFETs made on a very thin SOI filmIEEE Transactions on Electron Devices, 1989
- Trench-isolated transistors in lateral CVD epitaxial silicon-on-insulator filmsIEEE Electron Device Letters, 1984
- Vertical n-p-n bipolar transistors fabricated on buried oxide SOIIEEE Electron Device Letters, 1984
- Fully isolated lateral bipolar—MOS transistors fabricated in zone-melting-recrystallized Si films on SiO2IEEE Electron Device Letters, 1983
- Silicon-on-insulator bipolar transistorsIEEE Electron Device Letters, 1983
- The Oxidation of Shaped Silicon SurfacesJournal of the Electrochemical Society, 1982