Short-circuit power dissipation estimation for CMOS logic gates

This publication has 10 references indexed in Scilit:

• Trading speed for low power by choice of supply and threshold voltages
  IEEE Journal of Solid-State Circuits, 1993
• Estimation of typical power of synchronous CMOS circuits using a hierarchy of simulators
  IEEE Journal of Solid-State Circuits, 1993
• Comments on "A module generator for optimized CMOS buffers
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1993
• Low-power CMOS digital design
  IEEE Journal of Solid-State Circuits, 1992
• Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
  IEEE Journal of Solid-State Circuits, 1990
• A module generator for optimized CMOS buffers
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
• CMOS Circuit Speed and Buffer Optimization
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• Accurate simulation of power dissipation in VLSI circuits
  IEEE Journal of Solid-State Circuits, 1986
• Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits
  IEEE Journal of Solid-State Circuits, 1984
• Modeling and simulation of insulated-gate field-effect transistor switching circuits
  IEEE Journal of Solid-State Circuits, 1968