Scaling silicon MOS devices to their limits
- 30 September 1996
- journal article
- Published by Elsevier in Microelectronic Engineering
- Vol. 32 (1-4) , 271-282
- https://doi.org/10.1016/0167-9317(96)00008-1
Abstract
No abstract availableKeywords
This publication has 15 references indexed in Scilit:
- Performance trends in high-end processorsProceedings of the IEEE, 1995
- CMOS scaling into the 21st century: 0.1 µm and beyondIBM Journal of Research and Development, 1995
- Defect generation in 3.5 nm silicon dioxide filmsApplied Physics Letters, 1994
- Performance of 0.2 μm optical lithography using KrF and ArF excimer laser sourcesJournal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 1993
- X-ray lithography from 500 to 30 nm: X-ray nanolithographyIBM Journal of Research and Development, 1993
- Homogeneous lithium fluoride films as a high resolution electron beam resistMicroelectronic Engineering, 1992
- High-performance deep-submicrometer Si MOSFETs using vertical doping engineeringIEEE Transactions on Electron Devices, 1992
- Silicon-gate n-well CMOS process by full ion-implantation technologyIEEE Transactions on Electron Devices, 1980
- High-resolution imaging by wave-front conjugationOptics Letters, 1980
- Design of ion-implanted MOSFET's with very small physical dimensionsIEEE Journal of Solid-State Circuits, 1974