Testing for parametric faults in static CMOS circuits
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 13 references indexed in Scilit:
- Efficient generation of test patterns using Boolean differencePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Electrical properties and detection methods for CMOS IC defectsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- On the detection of delay faultsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Extraction and simulation of realistic CMOS faults using inductive fault analysisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Testing oriented analysis of CMOS ICs with opensPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Quiescent power supply current measurement for CMOS IC defect detectionIEEE Transactions on Industrial Electronics, 1989
- IC quality and test transparencyIEEE Transactions on Industrial Electronics, 1989
- The reliability of approximate testability measuresIEEE Design & Test of Computers, 1988
- Inductive Fault Analysis of MOS Integrated CircuitsIEEE Design & Test of Computers, 1985
- A Gate Level Model for CMOS Combinational Logic Circuits with Application to Fault DetectionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984