A “smarter-cut” approach to low temperature silicon layer transfer
- 5 January 1998
- journal article
- conference paper
- Published by AIP Publishing in Applied Physics Letters
- Vol. 72 (1) , 49-51
- https://doi.org/10.1063/1.120601
Abstract
Silicon wafers were first implanted at room temperature by with to ions/ cm at 180 keV, and subsequently implanted by H with ions/cm at an energy which locates the H-peak concentration in the silicon wafers at the same position as that of the implanted boron peak. Compared to the H-only implanted samples, the temperature for a B+H coimplanted silicon layer to split from its substrate after wafer bonding during a heat treatment for a given time is reduced significantly. Further reduction of the splitting temperature is accomplished by appropriate prebonding annealing of the B+H coimplanted wafers. Combination of these two effects allows the transfer of a silicon layer from a silicon wafer onto a severely thermally mismatched substrate such as quartz at a temperature as low as C.
Keywords
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