Compositional and electronic properties of chemical-vapor-deposited Y2O3 thin film-Si(100) interfaces

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Abstract
Thin Y2O3 dielectric films on p‐Si(100) structures prepared by low‐pressure chemical‐vapor deposition show an interfacial growth of a thin SiO2 layer (≊2 nm). Oxygen annealing at 580 °C for 45 min causes a further growth of this oxide layer to ≊8 nm. The interfacial silicon oxide has a bilayer structure consisting of crystalline SiO2 at the Y2O3 side and suboxide SiOx at the Si side of the interface as revealed by line shapes of Auger Si transition and Fourier‐transformed infrared spectroscopy studies. The as‐deposited Y2O3 film/Si‐based metal‐insulator‐ semiconductor MIS structures show a single‐step breakdown with a sharp breakdown field distribution, whereas the O2‐annealed structures show a two‐step selective breakdown with a dispersive breakdown distribution. O2‐annealed Y2O3 film/Si‐based MIS structures do not show the expected reduction in leakage currents. This is attributed to growth of a crystalline SiO2 layer and generation of defect and charge trapping at the Y2O3/SiO2/Si interface. The hysteresis effect observed in the C‐V curves at varied ramping rates shows that the nature of traps in the as‐deposited Y2O3 film/Si interface is such that the electron capture process is slower than emission, while in O2‐annealed structures the reverse is true.