Temperature-dependent hole and electron mobility models for CMOS circuit simulation
- 1 January 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 42 (11) , 1956-1961
- https://doi.org/10.1109/16.469403
Abstract
No abstract availableKeywords
This publication has 16 references indexed in Scilit:
- Characterization and modeling of the n- and p-channel MOSFETs inversion-layer mobility in the range 25–125°CSolid-State Electronics, 1994
- Universal MOSFET hole mobility degradation models for circuit simulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1993
- Analytical model for p-channel MOSFETsIEEE Transactions on Electron Devices, 1991
- Measurement of collector and emitter resistances in bipolar transistorsIEEE Transactions on Electron Devices, 1991
- Physical understanding of low-field carrier mobility in silicon MOSFET inversion layerIEEE Transactions on Electron Devices, 1991
- Investigation and modeling the surface mobility of MOSFETs from -25 to +150 degrees CIEEE Transactions on Electron Devices, 1988
- A semi-empirical model of the MOSFET inversion layer mobility for low-temperature operationIEEE Transactions on Electron Devices, 1987
- The study on hole mobility in the inversion layer of P-channel MOSFETIEEE Electron Device Letters, 1985
- Surfons and the Electron Mobility in Silicon Inversion LayersJapanese Journal of Applied Physics, 1974
- The Two-Dimensional Lattice Scattering Mobility in a Semiconductor Inversion LayerJournal of the Physics Society Japan, 1969