Universal MOSFET hole mobility degradation models for circuit simulation
- 1 March 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 12 (3) , 439-445
- https://doi.org/10.1109/43.215005
Abstract
Universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit simulation programs such as SPICE are presented. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness scattering for p-channel MOSFETs at room temperature, these models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The expressions reported accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate voltage, and substrate bias, and they agree very well with recently published experimental mobility degradation data. When implemented in a circuit simulation code, these models will accurately determine the channel mobility in surface p-channel MOSFETs using only the channel doping concentration, gate oxide thickness, substate bias, and applied gate drive voltage as input parametersKeywords
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