An anisotype GaAs/In/sub x/Ga/sub 1-x/As heterojunction field-effect transistor for digital logic applications

Abstract
An anisotype heterojunction field-effect transistor (A-HJFET) for GaAs digital integrated circuit applications is proposed. A thin, highly doped, strained In/sub x/Ga/sub 1-x/As (x<or=0.2) n-channel is employed for improved transconductance while a p/sup +/-GaAs cap is used to enhance the dynamic gate voltage range of the device. Prototype devices with 5- mu m gate lengths show a maximum transconductance of 80 mS/mm at V/sub ds/=2 V and a forward gate bias voltage of up to +2 V without significant leakage current.