InAlAs/InGaAs heterostructure FET's processed with selective reactive-ion-etching gate-recess technology
- 1 September 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 14 (9) , 425-427
- https://doi.org/10.1109/55.244718
Abstract
A highly selective reactive-ion-etching process based on HBr plasma has been used as a gate-recess technique in fabrication of InAlAs/InGaAs heterostructure FETs. A typical 0.75- mu m-gate-length transistor exhibited a threshold voltage of -1.0 V, a maximum extrinsic transconductance of 600 mS/mm, an extrinsic current-gain cutoff frequency of 37 GHz, and a maximum frequency of oscillation of 90 GHz. These DC and RF device parameters compare favorably with those of a corresponding device gate-recessed with a selective wet-etching technique.Keywords
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